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DDU12H
5-TAP, ECL-INTERFACED FIXED DELAY LINE (SERIES DDU12H)
FEATURES
GND 1 3 4 5 32 31 30 29
data 3 (R) delay devices, inc.
PACKAGES
GND T1 T3 T5 T2 T4 IN
* * *
Ten equally spaced outputs Fits in 300 mil 32-pin DIP socket Input & outputs fully 10KH-ECL interfaced & buffered
VEE GND T2 T4
8 9 11 12 24 23 22 21 GND T6 T8 T10
GND T2 T4 IN N/C VEE GND N/C N/C T7 T8 VEE
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
GND T1 T3 T5 N/C N/C GND N/C N/C T6 T8 T10
DDU12H-xx DIP DDU12H-xxM Military DIP
VEE 16
DDU12H-xxC3 SMD DDU12H-XXMC3 Mil SMD
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The DDU12H-series device is a 10-tap digitally buffered delay line. The IN Signal Input signal input (IN) is reproduced at the outputs (T1-T10), shifted in time by T1-T10 Tap Outputs an amount determined by the device dash number (See Table). For dash VEE -5 Volts numbers less than 20, the total delay of the line is measured from T1 to GND Ground T10. The nominal tap-to-tap delay increment is given by one-ninth of the total delay, and the inherent delay from IN to T1 is nominally 1.5ns. For dash numbers greater than or equal to 20, the total delay of the line is measured from IN to T10. The nominal tap-to-tap delay increment is given by one-tenth of this number.
SERIES SPECIFICATIONS
* * * * * * Minimum input pulse width: 10% of total delay Output rise time: 2ns typical Supply voltage: -5VDC 5% Power dissipation: 400mw typical (no load) Operating temperature: -30 to 85 C Temp. coefficient of total delay: 100 PPM/C
1.5ns 10% 10% 10% 10% 10% 10% 10% 10% 10%
DASH NUMBER SPECIFICATIONS
Part Number DDU12H-10 DDU12H-20 DDU12H-25 DDU12H-40 DDU12H-50 DDU12H-75 DDU12H-100 DDU12H-150 DDU12H-200 DDU12H-250 DDU12H-300 DDU12H-400 DDU12H-500 DDU12H-750 DDU12H-1000 DDU12H-1500 Total Delay (ns) 9 1.0 * 20 2.0 25 2.0 40 2.0 50 2.5 75 4.0 100 5.0 150 7.5 200 10.0 250 12.5 300 15.0 400 20.0 500 25.0 750 37.5 1000 50.0 1500 75.0 Delay Per Tap (ns) 1.0 0.3 2.0 0.4 2.5 0.4 4.0 0.5 5.0 1.0 7.5 1.5 10.0 2.0 15.0 2.0 20.0 2.0 25.0 2.0 30.0 2.0 40.0 2.0 50.0 2.5 75.0 4.0 100.0 5.0 150.0 7.0
VCC IN
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10 GND
Functional diagram for dash numbers < 20
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
VCC IN
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10 GND
* Total delay is referenced to first tap output Input to first tap = 1.5ns 1ns NOTE: Any dash number between 10 and 1500 not shown is also available.
Functional diagram for dash numbers >= 20
(c)1997 Data Delay Devices
Doc #97036
12/11/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
DDU12H
APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The DDU12H tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. Although the device will function properly for pulse widths as small as 10% of the total delay and periods as small as 20% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. However, for a given input condition, the deviation will be repeatable from pulse to pulse. Contact technical support at Data Delay Devices if your application requires device testing at a specific input condition.
POWER SUPPLY BYPASSING
The DDU12H relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VEE to GND, located as close as possible to the VEE pin, is recommended. A wide VEE trace and a clean ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER DC Supply Voltage Input Pin Voltage Storage Temperature Lead Temperature SYMBOL VEE VIN TSTRG TLEAD MIN -7.0 VEE - 0.3 -55 MAX 0.3 0.3 150 300 UNITS V V C C NOTES
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 75C) PARAMETER High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current SYMBOL VOH VOL VIH VIL IIH IIL MIN -1.020 -1.950 -1.480 475 0.5 TYP MAX -0.735 -1.600 -1.070 UNITS V V V V A A NOTES VIH = MAX,50 to -2V VIL = MIN, 50 to -2V
VIH = MAX VIL = MIN
Doc #97036
12/11/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
2
DDU12H
PACKAGE DIMENSIONS
32 31 30 29
24 23 22 21
.400 TYP.
1 3 4 5 8 9 11 12 16
1.650 TYP.
.020 .320 TYP. MAX. .150 .030 .100 .200 .300 .400 .700 .800 .900 1.000 1.100 .075 1.500 .018 TYP.
.012 TYP. .300 TYP.
DDU12H-xx (Commercial DIP) DDU12H-xxM (Military DIP)
.020 TYP.
.040 TYP.
.010.002
24 23 22 21 20 19 18 17 16 15 14 13
.710 .590 .005 MAX.
.882 .005 .007 .005
1
2
3
4
5
6
7
8
9
10 11 12
.090 1.100 1.280.020
.100
.280 MAX.
.050 .010
DDU12H-xxC4 (Commercial SMD) DDU12H-xxMC4 (Military SMD)
Doc #97036
12/11/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
DDU12H
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT: Ambient Temperature: 25oC 3oC Supply Voltage (Vcc): -5.0V 0.1V Input Pulse: Standard 10KH ECL levels Source Impedance: 50 Max. Rise/Fall Time: 2.0 ns Max. (measured between 20% and 80%) Pulse Width: PWIN = 1.5 x Total Delay Period: PERIN = 10 x Total Delay OUTPUT: Load: Cload: Threshold: 50 to -2V 5pf 10% (VOH + VOL) / 2 (Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
T1 PULSE GENERATOR OUT TRIG DEVICE UNDER TEST (DUT) IN T2 T3 T4 T5 T6 T7 T8 T9 T10
REF IN TRIG OSCILLOSCOPE
Test Setup
PERIN PWIN TRISE INPUT SIGNAL
80% 50% 20%
TFALL VIH
80% 50% 20%
VIL TFALL
TRISE OUTPUT SIGNAL VOH
50%
50%
VOL
Timing Diagram For Testing
Doc #97036
12/11/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
4

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